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Amoon's avatar
Amoon
Icon for New Contributor rankNew Contributor
5 months ago

Sopc2DTS with Agilex 7

After generating a qsys_top.sopcinfo with quartus for the SocFPGA Agilex 7 design, i'm trying to get the .dts then the .dtb from it via sopc2dts. I'm encountring the following issue: $ java -jar sop...
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ShoH_Altera's avatar
ShoH_Altera
Icon for Occasional Contributor rankOccasional Contributor
5 months ago

Hi @Amoon ,

The device tree generator tool(sopc2dts) is a very old tool and supports only the Linux kernel version targeted by the associated v18.0 or earlier GSRD. And the tool supports only Cyclone V, Arria V and Arria 10 HPS devices, not Agilex 7.

It is recommended to manage the Device Tree manually by using the Device Tree files provided by the kernel as a baseline, and by adding the FPGA IP and board information manually. Just like a normal Linux development flow.

If you are new to device tree, I'd to read this article once:

https://community.intel.com/t5/Intel-SoC-FPGA-Embedded/Investigating-Device-Trees/td-p/1610544

Regarding this question:

> is it mandatory to add some blocks in the .dts ?

It depends on what kernel driver you use in your design. Which hardware modules do you want to add? Maybe I can help you write the device tree node you should add.

Thanks,

Amoon's avatar
Amoon
Icon for New Contributor rankNew Contributor
5 months ago

Hi @ShoH_Altera ,

Thanks for your help.

I'm customizing a Linux kernel module to handle specific ticks or interrupts triggered by a particular GPIO pin.
What I need to understand is:

  1. How to associate my module with the specific GPIO pin that generates the interrupt.

  2. How to identify which GPIO pin is responsible for a particular interrupt event — in this case, it's a time event interrupt.