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GQUIR2's avatar
GQUIR2
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6 years ago

Other workflow for generating Preloader since Quartus-Prime Version 19.1 with "SoC EDS 19.1 Command Shell„

I work with FPGA-Eval-Board DE10-Standard from Terasic with Cyclone V and HPS. Before Quartus-Prime Version 19.1 workflow in "SoC EDS 18.1 Command Shell„ was: Generate the "Preloader" using the BSP...
EBERLAZARE_I_Intel's avatar
EBERLAZARE_I_Intel
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6 years ago

Hi Gerhard,

For confirmation, are you using the Standard or Pro version of SoC EDS 19.1?

Best Regards,

Eber.

GQUIR2's avatar
GQUIR2
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6 years ago
I am using “Intel FPGA Embedded Command Shell, Version 19.1 [Build 670]” and “Quartus Prime Version 19.1.0 Build 670 09/22/2019 Standard Edition”. Best Regards Gerhard