Intel Arria 10 PCIe DMA Reference Design problem

Hie Bhargav,

My apologies for the delayed first response. Typically we will answer within 48 hours but I missed your questions.

I have the following question:

• Which device are you migrating from?

Typically if you migrate from another device to Arria 10, you will need to re-specify all the Pin assignment, re-generate the IP. I will recommend using the Quartus generated example design instead to generate the PCIe IP (Instead of migrating). After that you will need to re-specify the Pin assignment either using Pin Planner or Assignment editor. Mainly the Tx Serial Pin, Rx Serial Pin, Refclk and PERSTn pins needs to be assigned to the correct location per the pin connection guideline. Also ensure the correct clock is connected to the CLKUSR IO pin as well.

Pin Connection Guideline:

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/dp/arria-10/PCG-01017.pdf

Example Design generation (Pg 11):

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_a10_pcie_avmm_dma.pdf

Please use the above solution to simplify the design bring up. The Example Design generation is as simple as one butoon click. After you have specified the Pin connection, you may complete compilation and the PCIe link should be up and device should be able to detected. Then you can move on to update the design.

Regards,

Nathan