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CAlex's avatar
CAlex
Icon for Contributor rankContributor
3 years ago

HWlib baremetal project issue: How to devide the codes.

Hi, forgive me to ask a foolish question: How to devide the codes in the project. I devided the codes into FPGA part and HPS part. As you can see both header files contain "alt_printf.h" an...
tehjingy_Altera's avatar
tehjingy_Altera
Icon for Regular Contributor rankRegular Contributor
3 years ago

HI Alex


After merging both files into one is it still having issues?

What error that you seen previously?


Regards

Jingyang, Teh


CAlex's avatar
CAlex
Icon for Contributor rankContributor
3 years ago

No,

it didnt happen any more.

BTW,

could I ask a question about debug?

While using SPL-debug.ds, it will stop at spl-boot-device function.

Usually I will do F8 to let it ran and disconnect.

But sometimes when I re-connect the SPL-debug.ds it will have a invisiable breakpoint at spl-boot-device, I cant step and run, I can only do jump to continue.

The same thing happened in main function as well, when I make a breakpoint(red dot,which means DS soft breakpoint?), I cant step/jump/continue the function. Actually when I do the step,it will only step till the main function reaches. The only thing I can do is disconnnect, cancel/add the breakpoint and reconnect again.

And then it will automatically do the main function even when I want to do the step.

I wrote some timer ISR and enabled some timers,is that the reason?