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SrLam9's avatar
SrLam9
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7 years ago

HPS2FPGA Bridge Throughput

Hi,

I am working on a project where there is a DDR4 RAM connected to the HPS2FPGA bridge and the host sends data to be saved in the RAM. I am trying to improve the throughput from the HPS to the DDR4, but the fastest I have achieved is ~16MB/s.

The software is written in C and the system is running embedded Linux. I am using the mmap() function to write the data to the DDR4 RAM. The program just writes large chunks of data to RAM. I am using an array of memory mapped locations in the example, but the rate is the same with only one map.

numOfBytes = 0x1000000;
for(i = 0; i < 32; i++)
{
	ret = BridgeMap(HPS2FPGA, i * numOfBytes, numOfBytes, &ddr4Map[i]);
	ddr4Reg[i] = (unsigned int *) (ddr4Map[i]); 
	for(j = 0; j < numOfBytes/4; j++)
	{
		ddr4Reg[i][j] = i;
	}
}
int BridgeMap(int bridgeType, int address, int numOfBytes, void ** pMap)
{
	if(fd_bridge == -1)
	{
		return -1;
	}
	int bridgeOffset, pageAlignedAddress;
 
	if(bridgeType == LWBRIDGE)
		bridgeOffset = LWBRIDGE_START;
	else if(bridgeType == HPS2FPGA)
		bridgeOffset = HPS2FPGA_START;
 
	pageAlignedAddress = (address / 0x1000) * 0x1000; // get page aligned address
	*pMap = mmap(NULL, numOfBytes, PROT_READ | PROT_WRITE, MAP_SHARED, 
			   fd_bridge,  bridgeOffset + pageAlignedAddress);
	if(pMap  == MAP_FAILED)
	{
		printf("error mapping: %s\n",strerror(errno));
		return -1;
	}
 
	return pageAlignedAddress; 
}

How can I improve the data rate going from the HPS to RAM? Is there a better way to communicate data from the HPS through the HPS2FPGA bridge? Should I be using the F2SDRAM bridge instead?

Thank you

10 Replies

  • FawazJ_Altera's avatar
    FawazJ_Altera
    Icon for Frequent Contributor rankFrequent Contributor

    Hello,

    The fastest way of transferring data between HPS and FPGA would be the use of DMA. memcpy and mmap are slow.

    You can refer to the datamover example:

    https://rocketboards.org/foswiki/Projects/Datamover

    where it shows you how to transfer data from HPS to FPGA and vice versa.

    Please let me know if you need further assistance,

    thanks

    • SrLam9's avatar
      SrLam9
      Icon for New Contributor rankNew Contributor

      Hi,

      Where can I find the example files? When I click the link for the zip file, the directory is empty aside from the README.

      Also I looked over the example (maybe the source files can help clarify), but something is still not clear to me. In my application, I would be receiving data from a host PC that needs to be saved on to RAM. The data comes in via Ethernet, and it ends up in an array after it is read. How do I transfer that to RAM or how can I find where that is located since the sgDMA needs a source and destination address.

      Thank you

  • FawazJ_Altera's avatar
    FawazJ_Altera
    Icon for Frequent Contributor rankFrequent Contributor

    Hello,

    I will check with our admin regarding the missing files. Once I get a feedback I will let you know.

    Thank you

  • FawazJ_Altera's avatar
    FawazJ_Altera
    Icon for Frequent Contributor rankFrequent Contributor

    Hello,

    the design files has been removed since it was built with an old Linux version. I will try to migrate the design to a newer linux OS and send them to you.

    Thank you

  • FawazJ_Altera's avatar
    FawazJ_Altera
    Icon for Frequent Contributor rankFrequent Contributor

    Hello,

    The design files cannot be migrated due to kernel module dependencies.

    I am still working on getting a workaround to overcome this issue,

    Thank you

    • SrLam9's avatar
      SrLam9
      Icon for New Contributor rankNew Contributor
      Thank you, Is it possible to send me the old files first? I want to take a look at the code itself. Especially the HPS code to see how I can implement something similar on my end. -Sid
  • FawazJ_Altera's avatar
    FawazJ_Altera
    Icon for Frequent Contributor rankFrequent Contributor

    Hello,

    My apologize for the late reply. I was able to fine the design files (excluding the kernel zImage file). It took some time to fine the linux module source code.

    I am still working on the alternative solution which might take extra time to verify.

    • SrLam9's avatar
      SrLam9
      Icon for New Contributor rankNew Contributor
      Hi, I will review these source files and let you know if I have any questions. Thank you
    • BC9's avatar
      BC9
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      Have you had a better solution?

      If yes, can you share it?

      Thanks a lot!

  • FPOPP1's avatar
    FPOPP1
    Icon for New Contributor rankNew Contributor

    Hello,

    I am also trying to start the data mover. This could be very useful in teaching SOCFPGA.

    Any chance to have it up and running in the actual tool landscape / linux version?

    Best regards,