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ArjunTechM's avatar
ArjunTechM
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4 years ago

How can i create QSYS Design using HPS for PCIe/Ethernet interface

Currently we are working with Agilex FPGA SOC Design. First time am using this Agilex SOC Design,would like to create a QSYS Design by connecting FPGA and HPS Interfaces through Platform design too...
JosafathB_Intel's avatar
JosafathB_Intel
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4 years ago

Hello, ArjunTechM.


Thank you for contacting Intel® Memory and Storage support.


This issue is related to FPGA, and we will move your thread to the Intel® FPGA Software support community.


Thank you for your patience and understanding.


Best regards.


Jos B.

Intel® Customer Support Technician