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Central1's avatar
Central1
Icon for New Contributor rankNew Contributor
3 years ago

FPGA digital image processing project. DE1SOC

Hello, hope everyone is doing fine. I am facing a problem with a digital image processing project that I am currently implementing on the DE1SOC FPGA. My proposed architecture is a generation of ...
EBERLAZARE_I_Intel's avatar
EBERLAZARE_I_Intel
Icon for Regular Contributor rankRegular Contributor
3 years ago

Hi,


Unfortunately, we don't have the example designs and driver for using the HPS for image processing.


You could take a look at our VIP UG on which IP would suite your desire and see if the example design on DVI Display below would help:

https://www.intel.com/content/www/us/en/docs/programmable/683416/22-1/about-the-video-and-image-processing-suite.html

https://www.intel.com/content/www/us/en/support/programmable/support-resources/design-examples/design-store.html?s=Relevancy&q=image