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schlee68's avatar
schlee68
Icon for New Contributor rankNew Contributor
3 years ago

Error: hps_system_AXI_cache_secruity_bridge

Hi- Everybody I have received example file in the following site: https://www.intel.com/content/www/us/en/support/programmable/support-resources/design-examples/horizontal/fpga-to-hps-bridges-des...
tehjingy_Altera's avatar
tehjingy_Altera
Icon for Regular Contributor rankRegular Contributor
3 years ago

Hi schlee68

Appologies for the late reply.

I manage to generate and compile the design.

Could you try sync the system info by clicking the "Sync System Infos" in the platform designer before generating.

Regards

Jingyang, Teh