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Hi Alex
Did you managed to get the design working?
Are you facing any problem so far?
Regards
Jingyang, Teh
Hi,
Sorry I didn't get that,
Please let me ask the question in another way:
In FPGA soft IP core there is a timer_pulse choise:
So I enabled this option and in top level verilog I linked that timeou_pulse to my LED[1] as shown:
top level u0
assignment
I started the timer in my user space code by writing 0110 on my control register:
userspace code
And observed the LED[1], it didn't blink on my board.
Please forgive me if my previouse posted questions confused you.
I attached the updated project for you.
You may need to change some LED pins if you are willing to run on Altera De10 standard.
My board is Terasic De10 standard.
Thank you for your willing to help.
Sorry for inconvenience.
Reguards
Alex