Forum Discussion
CAlex
Contributor
ContributorDe10 HPS issue with FPGA interval timer IP
Hi,
I'm now using the interval timer ip on HPS, I set the ip as general purposed timer.
The timer is set to 100 ms and there is a timer_palus link to my fpga led[1]
The setting is as shown:
...
CAlexContributor
ContributorIt seems I can't reset the TO bit, when I wish to reset the bit it turns to 1 immediately.
CAlexContributor
ContributorWhat I trying to get is a flag signal stays high for one clock wide and flip down for one clock wide and so on.
while (1)
{
if (*timer == 3)
{
*timer = 0;
!flag;
}
*led = flag;
};
It didn't work ,the flag stays the same when I read that.
