Forum Discussion
ramsoffer_123
Occasional Contributor
Occasional Contributorcyclone v ddr3 hard ip with multiport
Hi Everyone,
Im using cyclone V Soc evb board and Im trying to build example design for the ddr3 hard ip.
we are using quartus version 18.1.
memory clk: 400Mhz.
ddr interface data width:32bit...
AdzimZM_Altera
Regular Contributor
Regular ContributorHi Ram,
You can provide the ddr example design in archive project file.
That file should be smaller.
Regards,
Adzim
