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ramsoffer_123
Occasional Contributor
Occasional Contributorcyclone v ddr3 hard ip with multiport
Hi Everyone,
Im using cyclone V Soc evb board and Im trying to build example design for the ddr3 hard ip.
we are using quartus version 18.1.
memory clk: 400Mhz.
ddr interface data width:32bit...
ramsoffer_123Occasional Contributor
Occasional ContributorHi Adzim.
the design is very big.
I can't upload it here.
which part do you want me to send?
BR,
Ram.
