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Aravindpb's avatar
Aravindpb
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6 years ago

could not create the verilog HDL file

i am using the altera 5CGXFC7C62317N , when try to create the verilog HDL file quartus showing some error like(Error (275069): Design file contains illegal characters for Verilog HDL) i dont know w...
Vicky1's avatar
Vicky1
Icon for Regular Contributor rankRegular Contributor
6 years ago

Hi Aravind,

Could you please provide bit more information?

Quartus version(lite/pro/std) & Device used.

what exactly you did? please provide the Full screenshot.

Thanks,

Vikas

  • Aravindpb's avatar
    Aravindpb
    Icon for New Contributor rankNew Contributor
    6 years ago

    hai vicky thanks for your valuable reply you asked some more information needed . i provide the details and snap of my project error what is appering in the screen in the below content

    using cyclone v 5CGXFC7C6F2317 family

    compiler quartus prime 16.0 lite edition

    snapshots of my projects

    these are steps i followed to create verolg HDL

    Thanks,

    Aravind p