Building Yocto for FPGA boot first config on Agilex 7

Hello Jeetesh

Thank you for the link you've sent. But the problem is that I need to disable booting FPGA on SSBL stage and I couldn't find where is it can be disabled in U-Boot while compiling sd card image with Yocto.

I could only find something that controls booting process in file:

gsrd_socfpga/meta-intel-fpga-refdes/recipes-kernel/linux/linux-socfpga-lts/fit_kernel_agilex_fm87.its

		fpga-4 {
			description = "FPGA bitstream for GHRD";
			data = /incbin/("./ghrd.core.rbf");
			type = "fpga";
			arch = "arm64";
			compression = "none";
			load = <0xA000000>;
			hash {
				algo = "crc32";
			};

And during booting it can bee seen in a log

## Loading fpga from FIT Image at 02000000 ...
   Trying 'fpga-4' fpga subimage
     Description:  FPGA bitstream for GHRD
     Type:         FPGA Image
     Compression:  uncompressed
     Data Start:   0x0283c534
     Data Size:    3350528 Bytes = 3.2 MiB
     Load Address: 0x0a000000
     Hash algo:    crc32
     Hash value:   a4fe125a
   Verifying Hash Integrity ... crc32+ OK
   Loading fpga from 0x0283c534 to 0x0a000000
....Error sending bitstream!
....Error sending bitstream!
FPGA image is corrupted or invalid
SCRIPT FAILED: continuing...
** Unable to read file / **
Failed to load '/'