Arria 10 SoC FPGA Remote update via HPS/linux

Hi Aik,

I'm using already option 2 of the Bootloader. This is the work flow that I want to obtain:

1. Cold reset (power on)
2. SPL loads peripheral rbf
3. TPL u-Boot loads core rbf
4. TPL boots to linux
5. linux transfers a new .itb file to FAT partition
6. linux issues reboot command
7. SPL loads NEW peripheral rbf contained in new .itb file
8. TPL u-Boot loads new core rbf contained in new .itb file
9. TPL boots to linux

Mostly similar to this topic https://forum.rocketboards.org/t/arria10-u-boot-2021-04-support-reboot-from-linux/2845

The current situation is this:

1. Cold reset (power on)
2. SPL loads peripheral rbf
3. TPL u-Boot loads core rbf
4. TPL boots to linux
5. linux transfers a new .itb file to FAT partition
6. linux issues reboot command
7. SPL skips peripheral load (BAD, we want the new peripiheral image!)
8. TPL u-Boot attempts to load core rbf
9. TPL hangs and watchdog reboots (repeat from step 6).

The problem is that in step 7, SPL skips peripheral load since FPGA is already programmed.

Is there a option to force the peripheral and core programming at every reboot issued by linux, without having a power cycle of the board? I'm trying to use the patch in uboot suggested in that topic but it seems to not work as intended.