Agilex Ftile is not asserting tx_ready after the reset sequence (tx_rreset/tx_reset_ack)

Hi K**bleep**ij,

Thank you for your quick response. Yes, I fulfilled the reset sequence that was described in 6.7. I am getting tx_reset_ack/rx_reset_ack, tx_pll_locked and rx_is_lockedtoref but not tx_ready/rx_ready. that I mentioned before.

I also noticed that when tx_pll_locked is asserted, tx_clkout2 stop toggling. Please look at the at the waveform again, the run-time reset sequence is following as indicated in 3.8.8 except asserting tx_ready/rx_ready

I am using Questasim simulator. I am using FAST_SIM directive. Please let me know, if I am missing something.

Appreciate your response. I am still stuck at this point.

Thanks

Mesbah