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Altera_Forum's avatar
Altera_Forum
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11 years ago

Xtandard elements usage report - ADDER, MUX

Dear Forum,

In the Xilinx tool synthesis log, we can see the number of adders,muxes and registers used in the design. Something like this:

---Muxes :

2 Input 5 Bit Muxes := 1

2 Input 1 Bit Muxes := 1

Module QUANT_TOP

Detailed RTL Component Info :

+---Adders :

2 Input 6 Bit Adders := 2

+---Registers :

6 Bit Registers := 3

1 Bit Registers := 3

+---Muxes :

Does Altera have such report?

I searched whole day and could not find(( Seems from Quartus we can never get the number of ADDERs, COUNTERs,MUXes used for synthesizing the design.

Please help

4 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    Its probably because this information is fairly uselss as at the end of the day it will all get mapped to LUTs, registers, memories and Multipliers. THe Synth report will report an estimated usage of these.

  • Altera_Forum's avatar
    Altera_Forum
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    Dear Tricky,

    In our flow we have limitation for the number of ADDERs used. This limitation comes from lots of reasons, one of them is activity-power.

    As you know, Altera has RTL Viewer, which shows the design in the way that we want i.e. it synthesis the circuit by ADDers, COUNTERs, MUXes and so on.

    What we need is dumping that information into some file, which we can parse by scripts.

    Please help to get that info.
  • Altera_Forum's avatar
    Altera_Forum
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    The Adders etc are just the elaboration pass - the very first bit of the synthesis. they dont really have a direct meaning on hardware until it is mapped to luts and regs.

    During the actual synthesis phase, some of the RTL elements may be merged or removed for synthesis optimisation.
  • Altera_Forum's avatar
    Altera_Forum
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    And adders will not affect the power usage. It will be the logic usage that affects power.