Altera_ForumHonored Contributor11 years agoXtandard elements usage report - ADDER, MUX Dear Forum, In the Xilinx tool synthesis log, we can see the number of adders,muxes and registers used in the design. Something like this: ---Muxes : 2 Input 5 Bit Muxes :=...Show More
Altera_ForumHonored Contributor11 years agoAnd adders will not affect the power usage. It will be the logic usage that affects power.
Recent DiscussionsInterfacing Avalon Streaming FIFO IP with GTS Ethernet Hard IPInvalid license key (inconsistent authentication code)Regarding the issue of UFM not startingram retimingReset Release IP for Agilex needs Stratix 10 device files installed!