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JoeLUH's avatar
JoeLUH
Icon for New Contributor rankNew Contributor
3 years ago
Solved

Wrong syntax highlighting in editor when using "define" in Verilog

Hi Switching from Quartus Prime Standard 19 to >=20 I found out that the syntax highlighting is not working correctly any more in the editor if a definition statement is given in a different file. ...
  • RichardT_altera's avatar
    RichardT_altera
    3 years ago

    Thank you for the feedback provided on this issue.

    The engineering team has aware of this issue and they will plan to fix this. (usually will takes some time e.g. a couple of months before it got fix in the next Quartus release.)

    Since this issue will be planned to be fixed, do you need further help in this case?


    Regards,

    Richard Tan


RichardT_altera's avatar
RichardT_altera
Icon for Super Contributor rankSuper Contributor
3 years ago

Thank you for the feedback provided on this issue.

The engineering team has aware of this issue and they will plan to fix this. (usually will takes some time e.g. a couple of months before it got fix in the next Quartus release.)

Since this issue will be planned to be fixed, do you need further help in this case?


Regards,

Richard Tan


  • JoeLUH's avatar
    JoeLUH
    Icon for New Contributor rankNew Contributor
    3 years ago

    Thank you. In the meantime, I will get along with one of the older versions.

    Best regards, Joe