Forum Discussion
27 Replies
- Altera_Forum
Honored Contributor
what i should to do ?
- Altera_Forum
Honored Contributor
like I said, you need to include the source code for all of your components in your project
You havent shown the source code for them here - so I assume you have them on your machine elsewhere. If the source code doesnt exist - you need to write it. - Altera_Forum
Honored Contributor
I will be explicit with you I do not know how to writing
- Altera_Forum
Honored Contributor
There are many VHDL tutorials and text books out there - I suggest you do some research.
- Altera_Forum
Honored Contributor
I search many website try Execution code is same problem:(:confused:
----- File project.vhd: --------------------- 2 LIBRARY ieee; 3 USE ieee.std_logic_1164.all; 4 ------------------------------------ 5 ENTITY project IS 6 PORT (a, b, c, d: IN STD_LOGIC; 7 x, y: OUT STD_LOGIC); 8 END project; 9 ------------------------------------ 10 ARCHITECTURE structural OF project IS 11 ------------- 12 COMPONENT inverter IS 13 PORT (a: IN STD_LOGIC; b: OUT STD_LOGIC); 14 END COMPONENT; 15 ------------- 16 COMPONENT nand_2 IS 17 PORT (a, b: IN STD_LOGIC; c: OUT STD_LOGIC); 18 END COMPONENT; 19 ------------- 20 COMPONENT nand_3 IS 21 PORT (a, b, c: IN STD_LOGIC; d: OUT STD_LOGIC); 22 END COMPONENT; 23 ------------- 24 SIGNAL w: STD_LOGIC; 25 BEGIN 26 U1: inverter PORT MAP (b, w); 27 U2: nand_2 PORT MAP (a, b, x); 28 U3: nand_3 PORT MAP (w, c, d, y); 29 END structural;Error: Node instance "U1" instantiates undefined entity "inverter" Error: Node instance "U2" instantiates undefined entity "nand_2" Error: Node instance "U3" instantiates undefined entity "nand_3" Error: Quartus II Analysis & Synthesis was unsuccessful. 3 errors, 0 warnings Error: Quartus II Full Compilation was unsuccessful. 5 errors, 0 warnings - Altera_Forum
Honored Contributor
Yes - you havent defined the behaviour for the components.
- Altera_Forum
Honored Contributor
which way must i used this wrong