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Altera_Forum
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9 years ago

Will Quartus ever support Verilog hierarchical parameter referencing?

Hello, module p { parameter x = some expresssion; ... } p p_inst(); localparam x = p.x; This would be really useful i.e. read as essential for what I am trying to do. A...
Altera_Forum's avatar
Altera_Forum
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9 years ago

Delving into the LRM a bit further, I'm not sure it is actually legal code to assign anything other than a constant to a parameter or localparam definition. Having said that, the hierarchical reference does resolve to a constant in the end.

I do also get this warning in Quartus:

"Warning(16820): Verilog HDL warning at signedmultiply.v(526): constant expression cannot contain a hierarchical identifier "

I'm not sure if this means it is illegal or "we don't support that", since Modelsim obviously does so.