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Altera_Forum's avatar
Altera_Forum
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13 years ago

Why i can't modify my project in Chip Planner with ECOs?

Hi dears:

I want to modify my design in resource property editor. As attached file shows, i want change the input from "dataf" to "dataa" or "datab", and remove "dataf". But, when i "check and save all netlist changes" QII gave out errors as below:

Error (15629): Atom "op_1~1" is dependent on unconnected input ports

Error (23031): Evaluation of Tcl script d:/altera/11.1/quartus/common/tcl/internal/eco_flow_prepare.tcl unsuccessful

Error: Quartus II 32-bit Compiler Database Interface was unsuccessful. 2 errors, 0 warnings

Error: Peak virtual memory: 311 megabytes

Error: Processing ended: Sun Aug 26 12:55:04 2012

Error: Elapsed time: 00:00:03

Error: Total CPU time (on all processors): 00:00:03

Error (293001): Quartus II ECO Fitting was unsuccessful. 4 errors, 0

It seems the input i changed can't replace the old one entirely!!! How can i do that can approach my purpose?

2 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    13 years ago

    There are several possible reasons why the intended edit can't be implemented:

    - the logic function coded in the LUT mask is referring to unconnected inputs

    - you're trying to route signals to LUT inputs that can't be driven by them due to routing restrictions

    The error message seams to support the first assumption.

    What are you trying to achieve?
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    13 years ago

    --- Quote Start ---

    There are several possible reasons why the intended edit can't be implemented:

    - the logic function coded in the LUT mask is referring to unconnected inputs

    - you're trying to route signals to LUT inputs that can't be driven by them due to routing restrictions

    The error message seams to support the first assumption.

    What are you trying to achieve?

    --- Quote End ---

    Thanks for you reply!

    For example, assume that i want to implement a single bit adder (two input). So only single LE or ALM is enough for it. There are at least 8 inputs for ALM which can be used as the adder's two inputs. I want to test the output of the adder when the adder's inputs come into the ALUT through different inputs of the ALUT. The source modification can't approach it, i think ECO may approach it. So I try to modify the input of the adder and examine the output results. There are several possibilities of the adder's inputs come into the ALUT. What's i want is to approach every possibility and test them.