Honored Contributor
Honored ContributorUpdate: Although "maxdepth = 1024" solved the issue for the most critical parts, I still see the issue described in the first post on other places (where I also added the maxdepth attribute).
E.g. I have defined simple dual-ported memory with 3648 8-bit elements and maxdepth=1024, which should use 4 M10K blocks. Quartus inferres implementations using 4 (as expected), 6 and 8 M10k blocks for different instatances. I don't have any clue how/why Quartus determines when to use more then 4 blocks - as all blocks are similar configured. I get the following message for a 4, 6, and 8 M10K inferrenced ram - which seem to have as far as I can see all the same configuration: 8M10K: Info (276029): Inferred altsyncram megafunction from the following design logic: "census:mycensus|census_leftInputBuf_lineBuffer_1:leftInputBuf_lineBuffer_9_U|census_leftInputBuf_lineBuffer_1_ram:census_leftInputBuf_lineBuffer_1_ram_U|ram_rtl_0" Info (286033): Parameter OPERATION_MODE set to DUAL_PORT Info (286033): Parameter WIDTH_A set to 8 Info (286033): Parameter WIDTHAD_A set to 12 Info (286033): Parameter NUMWORDS_A set to 3648 Info (286033): Parameter MAXIMUM_DEPTH set to 1024 Info (286033): Parameter WIDTH_B set to 8 Info (286033): Parameter WIDTHAD_B set to 12 Info (286033): Parameter NUMWORDS_B set to 3648 Info (286033): Parameter ADDRESS_ACLR_A set to NONE Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED Info (286033): Parameter ADDRESS_ACLR_B set to NONE Info (286033): Parameter OUTDATA_ACLR_B set to NONE Info (286033): Parameter ADDRESS_REG_B set to CLOCK0 Info (286033): Parameter INDATA_ACLR_A set to NONE Info (286033): Parameter WRCONTROL_ACLR_A set to NONE Info (286033): Parameter INIT_FILE set to db/census.ram0_census_leftInputBuf_lineBuffer_1_ram_3eb21b1e.hdl.mif Info (286033): Parameter RDCONTROL_REG_B set to CLOCK0 6 M10K: Info (276029): Inferred altsyncram megafunction from the following design logic: "census:mycensus|census_leftInputBuf_lineBuffer_1:leftInputBuf_lineBuffer_10_U|census_leftInputBuf_lineBuffer_1_ram:census_leftInputBuf_lineBuffer_1_ram_U|ram_rtl_0" Info (286033): Parameter OPERATION_MODE set to DUAL_PORT Info (286033): Parameter WIDTH_A set to 8 Info (286033): Parameter WIDTHAD_A set to 12 Info (286033): Parameter NUMWORDS_A set to 3648 Info (286033): Parameter MAXIMUM_DEPTH set to 1024 Info (286033): Parameter WIDTH_B set to 8 Info (286033): Parameter WIDTHAD_B set to 12 Info (286033): Parameter NUMWORDS_B set to 3648 Info (286033): Parameter ADDRESS_ACLR_A set to NONE Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED Info (286033): Parameter ADDRESS_ACLR_B set to NONE Info (286033): Parameter OUTDATA_ACLR_B set to NONE Info (286033): Parameter ADDRESS_REG_B set to CLOCK0 Info (286033): Parameter INDATA_ACLR_A set to NONE Info (286033): Parameter WRCONTROL_ACLR_A set to NONE Info (286033): Parameter INIT_FILE set to db/census.ram0_census_leftInputBuf_lineBuffer_1_ram_3eb21b1e.hdl.mif Info (286033): Parameter RDCONTROL_REG_B set to CLOCK0 4 M10K: Info (276029): Inferred altsyncram megafunction from the following design logic: "census:mycensus|census_leftInputBuf_lineBuffer_1:leftInputBuf_lineBuffer_8_U|census_leftInputBuf_lineBuffer_1_ram:census_leftInputBuf_lineBuffer_1_ram_U|ram_rtl_0" Info (286033): Parameter OPERATION_MODE set to DUAL_PORT Info (286033): Parameter WIDTH_A set to 8 Info (286033): Parameter WIDTHAD_A set to 12 Info (286033): Parameter NUMWORDS_A set to 3648 Info (286033): Parameter MAXIMUM_DEPTH set to 1024 Info (286033): Parameter WIDTH_B set to 8 Info (286033): Parameter WIDTHAD_B set to 12 Info (286033): Parameter NUMWORDS_B set to 3648 Info (286033): Parameter ADDRESS_ACLR_A set to NONE Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED Info (286033): Parameter ADDRESS_ACLR_B set to NONE Info (286033): Parameter OUTDATA_ACLR_B set to NONE Info (286033): Parameter ADDRESS_REG_B set to CLOCK0 Info (286033): Parameter INDATA_ACLR_A set to NONE Info (286033): Parameter WRCONTROL_ACLR_A set to NONE Info (286033): Parameter INIT_FILE set to db/census.ram0_census_leftInputBuf_lineBuffer_1_ram_3eb21b1e.hdl.mif Info (286033): Parameter RDCONTROL_REG_B set to CLOCK0
