Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

Why does infer Quartus so many M10k blocks in this case?

Hi, For a Cyclone-V based designed I have defined a simple dual-ported ram in vhdl, with a data-width of 9-bits, 12-bit address width and 3648 elements (vhdl file attached). Using 9-bit eleme...