Why does infer Quartus so many M10k blocks in this case?

By default Quartus will use one block per data bit to improve performance. Using 4 blocks will infer some logic on the address bits to select which M10K to use, and this will result in a slightly lower FMAX than using 9 blocks in 1-bit mode.

If you use the RAM megafunction, you can define the maximum block depth parameter that will tell quartus how to organize the memory blocks. Have a look here (http://www.altera.com/literature/ug/ug_ram_rom.pdf) on page 3-9 to see how it is used. I don't know if you can also define it in a synthesis attribute though, you may have to use the megafunction instead.