Forum Discussion
Altera_Forum
Honored Contributor
9 years agoWho wins VERILOG_MACRO.qsf or `define.v?
I have a design which `includes a header file which has `defines for default mode, say:`define ASIC_VERSION 32'h00000001 I have an "override" in my .qsf to specify the FPGA build, say:set_glob...
Altera_Forum
Honored Contributor
9 years agoHow about:
`ifndef ASIC_VERSION
`define ASIC_VERSION 32'h00000001
`endif will define ASIC_VERSION only if it is not currently defined (by the .qsf file) ( replaced `ifdef ... `else with `ifndef )