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Altera_Forum
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13 years ago

Which way will make fabrication easier

Hello, I am currently making a design on an Altera FPGA which may become fabricated. My question is should I construct the design completely using block diagrams, and primitive gates, or should I als...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

I will probably choose to go with the standard cell ASIC design. In that case I will need to use all VHDL code and then use some sort of software to convert it into an ASIC friendly design. Is that correct?