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Altera_Forum's avatar
Altera_Forum
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12 years ago

which part of data in ethernet frame should be passed to CRC generator?

after pass payload to CRC generator, wireshark do not receive any ethernet frame i guess wrong, i do not know where to check, i am afraid that ethernet port in PC side drop the frame from FPGA whe...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

Do you get any data out when you aren't using a trigger? Are you sure that SW[0] actually changes?

As for your other question, you can probe any signal with SignalTap, including the internal ones. By default you only see the toplevel signals, but in the node finder you can go deeper in the hierarchy.