Which one is the right design??(very simple design)

begin
--q <= input; -- comment in if in project
  
process (clk,rst)  
  begin
  
    if  (rst='1') then
           output <= "00000000";    
     elsif (clk'event and clk='1') then
   q <= input; -- comment out if in project
    
       output(0)  <=  q(7)  AND q(6) AND q(4) AND q(3) AND q(1) AND q(0)  ; 
       output(1)  <=  q(4)  AND q(2)   ;
       output(2)  <=  q(5)  AND q(0)   ;
       output(3)  <=  q(4)  AND q(2)   ; 
       output(4)  <=  q(7)  AND q(5)   ;
       output(5)  <=  q(7)  AND q(5) AND q(4) AND q(1)  ;
       output(6)  <=  q(5)  AND q(3) AND q(0)  ;
       output(7)  <=  q(5)  AND q(3) AND q(1) AND q(0)  ;
    end if;
  end process;
end architecture kkk;