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Altera_Forum
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14 years ago

Which one is the right design??(very simple design)

please i need yours help. in the following design the result was calculated by the signal (x) and connected to the output port (output), i got the following result: lut =17 worst-case tsu ...
Altera_Forum's avatar
Altera_Forum
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14 years ago

I should have said fmax is for output registers only(not x registers and does not apply to gating logic infront of x up to inputs)