Im not sure I like this statement:
start <= '1' when prehold = "1101010101010101010101010101010101010101010101010101010101010101" and not valid_fe else '0';--start storing the ethernet frame until we get a falling edge of valid
You have 64 elements in a single gate. This would be very slow when it's put into real hardware, and likely prone to setup time violations.
Instead of using a shift register, it might be better (and probably cheaper logic wise) to use a state machine to watch the incoming bit-stream, and when the correct stream appears, put it into a "start" state, or fire off a start signal.