Forum Discussion
I use Quartus prime lite17.1,Modelsim starter edition,intel HLS compiler.
I want to generate verilog from C++ using intel hls compiler.
Hi,
Are you using Windows or Linux?
You may need to check if your are navigated to the correct directory:
You may refer to below document on the HLS compiler reference manual:
- ishikawa5 years ago
New Contributor
i use windows10.
We have already checked the sites provided. I'm following, but when I do test-fpga at the command prompt, I get an error like I described in the first paragraph.
I've attached the batch file I'm using. I would be very grateful if you can find a solution.
-------------------------------------------------------------------------------------------------------------
ihc_setup.bat
@echo off
::Please Set Following Param
::################################################################
::Set IHC root path
set IHCROOT=C:\intelFPGA_lite\17.1\hls
::Set VC install path
set VC_INSTALL=C:\Program Files (x86)\Microsoft Visual Studio 10.0
::################################################################::Do not edit from here!!
::################################################################
::Set Tools Env
set VS100COMNTOOLS=%VC_INSTALL%\Common7\Tools
set PATH=%VC_INSTALL%\VC\bin\amd64;C:\IntelFPGA\17.1\modelsim_ase\win32aloem;%PATH%
set INCLUDE=C:\Program Files (x86)\Microsoft SDKs\Windows\v7.1\Include;%VC_INSTALL%\VC\include;%INCLUDE%
set LIB=%VC_INSTALL%\VC\lib\amd64;C:\Program Files (x86)\Microsoft SDKs\Windows\v7.1\Lib\x64;%LIB%
set LIBPATH=%VC_INSTALL%\VC\lib\amd64;C:\Program Files (x86)\Microsoft SDKs\Windows\v7.1\Lib\x64;%LIBPATH%call %IHCROOT%\init_hls.bat
cmd
-------------------------------------------------------------------------------------------------------------
build.bat
@echo off
set "SOURCE_FILES=counter.cpp"
set "HLS_CXX_FLAGS="
:: This batch file will compile the example design to three standard targets:
:: 1) test-msvc Compile the example design to the CPU
:: Uses Visual Studio 2010
:: 2) test-x86-64 Compile the example design to the CPU
:: Uses the Intel HLS Compiler
:: 3) test-fpga Synthesize the example design to HDL
:: Generates a cosimulation executable to simulate the HDL
:: Uses the Intel HLS Compiler
:: 4) clean Remove any temporary files generated by the compiler
:: Usage: build.bat <target>
:: Example: build.bat test-x86-64:: Only one argument expected
if not "%2"=="" goto usage:: Accept the user's target, else default to x86-64
if not "%1"=="" (
set "TARGET=%1"
) else (
set "TARGET=test-x86-64"
echo No target specified, defaulting to %TARGET%
echo Available targets: test-x86-64, test-fpga, test-msvc, clean
):: Any tools installed with HLS can be found relative to the location of i++
for %%I in (i++.exe) do (
set "HLS_INSTALL_DIR=%%~dp$PATH:I"
)
set "HLS_INSTALL_DIR=%HLS_INSTALL_DIR%..":: Set up the compile variables
if "%TARGET%" == "test-x86-64" (
set "CXX=i++"
set "CXXFLAGS=%HLS_CXX_FLAGS% -march=x86-64"
set "LFLAGS=-o %TARGET%.exe"
) else if "%TARGET%" == "test-fpga" (
set "CXX=i++"
set "CXXFLAGS=%HLS_CXX_FLAGS% -march=CycloneV
set "LFLAGS=-o %TARGET%.exe"
) else if "%TARGET%" == "test-msvc" (
set "CXX=cl"
set "CXXFLAGS=/I ""%HLS_INSTALL_DIR%\include"" /nologo /EHsc /wd4068 /DWIN32 /MD"
set "LFLAGS=/link ""/libpath:%HLS_INSTALL_DIR%\host\windows64\lib"" hls_emul.lib /out:%TARGET%.exe"
) else if "%TARGET%" == "clean" (
del /S /F /Q test-msvc.exe test-fpga.exe test-fpga.prj test-x86-64.exe > NUL
rmdir /S /Q test-fpga.prj > NUL
goto:eof
) else (
goto usage
):: Replace "" with " in the flags
set "CXXFLAGS=%CXXFLAGS:""="%"
set "LFLAGS=%LFLAGS:""="%":: Kick off the compile
echo %CXX% %CXXFLAGS% %SOURCE_FILES% %LFLAGS%
%CXX% %CXXFLAGS% %SOURCE_FILES% %LFLAGS%
if not ERRORLEVEL 0 (
echo Error: Compile failed
exit /b 1
)
echo Run %TARGET%.exe to execute the test.:: We're done!
goto:eof:: Dump the usage if we get unexpected input
:usage
echo Usage: build.bat [target]
echo Targets: test-msvc, test-x86-64, test-fpga, clean
echo Example: build.bat test-x86-64
exit /b 2-----------------------------------------------------------------------------------
- EBERLAZARE_I_Intel5 years ago
Regular Contributor
Hi,
Have you try using the version 19.3 and above to test?
- ishikawa5 years ago
New Contributor
I used 17.1 because I heard that there is no intelHLS compiler after 17.1.
I checked the manual and did a high-level synthesis, but I got the following error in the debug file.
---------------------------------------------------------------------------------------------------------------------
2020.11.16.15:11:40 Info: Regenerate these scripts whenever you make any change to any Quartus-generated IP in your project.
2020.11.16.15:11:40 Info: Finished: <b>Create Modelsim Project.</b>
Error loading design
er\test-fpga.prj\verification>set rundir=c:\hlspractice\counter\test-fpga.prj\verificationc:\hlspractice\counter\test-fpga.prj\verification>set scripthome=c:\hlspractice\counter\test-fpga.prj\verification\
c:\hlspractice\counter\test-fpga.prj\verification>cd c:\hlspractice\counter\test-fpga.prj\verification\
c:\hlspractice\counter\test-fpga.prj\verification>vsim -batch -do "do tb/simulation/mentor/msim_compile.tcl"
Reading C:/altera/13.1/modelsim_ase/tcl/vsim/pref.tcl
Error: ** Error: (vish-3296) Unknown option '-batch'.
Error: Use the -help option for complete vsim usage.c:\hlspractice\counter\test-fpga.prj\verification>set exitCode=1
c:\hlspractice\counter\test-fpga.prj\verification>cd c:\hlspractice\counter\test-fpga.prj\verification
c:\hlspractice\counter\test-fpga.prj\verification>exit /b 1