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Altera_Forum
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13 years ago

What is mean of rhis critical warning and how to handle it?

When I compile my design which use two plls in a EP4CE55F device, I have a cirtical warning as following: Critical Warning (176598): PLL "DSP_System:dsp_system|HistoComputeScene:histocomputesce...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

Hi Dave, could you please help me this question "if the board has multiple clkin pins for FPGA chip, if I use two pins for FPGA to drive different modules, the phase of clocks come from these two pins should be exactly same, right?"

Thanks very much.