Forum Discussion
Altera_Forum
Honored Contributor
13 years agoThe actual timing characteristics of the chips are subject to PVT (process, voltage, temperature) variations.
Process: no two chips are equal. For a given FPGA speedgrade, some chips will be faster, some slower. Voltage: higher Vcc makes the chip faster, lower Vcc makes the chips slower. Temperature: lower T makes the chips faster, higher T makes the chip slower (0C is 0ºC, 85C is 85 ºC). To ensure that the design will actually work in the real world, with different chips, subject variations in Vdd and different temperatures, STA tools usually run the analysis for 3 cases, known as corners: an extreme fast case, an extreme slow case and a typical case.