Altera_Forum
Honored Contributor
Honored ContributorWhat is Altera equivalent of Xilinx`s IBUF?
Hi,
Could someone tell if there is similar or equivalent in Altera of Xilinx`s IBUF? ThanksForum Discussion
2 Replies
Altera_ForumHi,
Altera also has IO buffers , these are called ALT_INBUF. Example :
For more information refer https://www.altera.com/en_us/pdfs/literature/ug/ug_low_level.pdfmodule io_primitives (data_in, data_out); input data_in; wire internal_sig; output data_out; alt_inbuf my_inbuf (.i(data_in), .o(internal_sig)); defparam my_inbuf.io_standard="1.8 V HSTL Class I"; assign data_out = !internal_sig; endmodule- Altera_Forum--- Quote Start --- Hi, Altera also has IO buffers , these are called ALT_INBUF. Example :
For more information refer https://www.altera.com/en_us/pdfs/literature/ug/ug_low_level.pdf --- Quote End --- How to customize the ALT_INBUF IP core. For example 4-bit counter 4-bit counter output , how i need to connect to outbuff-diff for 4 bits.module io_primitives (data_in, data_out); input data_in; wire internal_sig; output data_out; alt_inbuf my_inbuf (.i(data_in), .o(internal_sig)); defparam my_inbuf.io_standard="1.8 V HSTL Class I"; assign data_out = !internal_sig; endmodule
