What does the "work item" stand for in FPGA?

I would encourage you to look up two System Verilog files AOC -c generates from your kernel in the text editor. Their names are <kernel>_system.v and <kernel>.v. The former file will have all compute units ( or instances ) of the pipelined kernel FPGA logic (I use logic name here because this is what you get at the end) and the latter file is the kernel logic itself. It is worth while to learn the entire process of building a custom parallel computing machine for your code - your OpenCL host/device code. The beauty of the FPGA is that you will never be limited to CPU architecture that was conceived in 1945 or to latest GPU silicon optimized only for the latest hype like CNN, and I don't mean "fake news". You can build any system to do anything with FPGAs. But with GPUs and CPUs will be limited the most of the time because they are a fixed logic silicon.

As far as the rest of the bugs Intel/Altera API has, I would recommend to open Service Request at myAltera to point out to them 1 returned by the API call for multiple compute units. Doing so will make OpenCL on FPGA more useful for everyone.