Forum Discussion
Dolemy
New Contributor
New ContributorWhat determines the maximum division factor of PLL in megawizard?
I am currently studying through the FPGA through Terasic DE2
I am using Quartus version 13.0spi.
Recently, I learned how to divide or multiply CLK using PLL.
I use Megawizard for this as it ...
DolemyNew Contributor
New ContributorThank you for your answer.
I read the Handbook according to your answer and solved the problem.
My problem was that cyclone ii supports a lower number of division and multiflier factors than I thought.
In the end, I added a separate circuit to my project to achieve my target clock
. Thanks to your answer, I was able to solve the problem. Thank you
lixy
Contributor
ContributorHi there,
Good to know my answer helps!
By the way, we would appreciate it if you can take a moment to fill in the satisfaction survey. Your feedback is valuable and helps us improve our support quality.
Best regards,
Xiaoyan
- Dolemy
Of course!
But I don’t know where to do a survey.
Can you tell me how?
