Altera_ForumHonored Contributor13 years agoWhat data types can be synthesis in VHDL I read VHDL tutorial but are confused in some data types. I found there are a lot of data types in VHDL, it is not easy to remember all of them. I think only some of them are commonly used, the...Show More
Altera_ForumHonored Contributor13 years agoThanks very much, both of you. I will post here if I have further questions.
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