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Altera_Forum
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12 years ago

Weirdest thing - MAX3000A simulation

I think I'm going crazy... I created a simple project for MAX3000A (schematic file, part of the schematic is attached) and tried to simulate in ModelSim - SE. https://www.alteraforum.com/forum/...
Altera_Forum's avatar
Altera_Forum
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12 years ago

Looked at the gate level design more carefully - the explanation does not look so simple... Even if we assume the counter DD3-3 is clocked by wrong edge of the clock (being connected directly to p41 instead of clk53), this does not explain why the counter DOES count with ANY input...

And I think the gate level netlist is correct - p41 signal being inverted inside of lpm_counter2 and does not require separate invertor inst12... Of course, I can be wrong...