Forum Discussion
Altera_Forum
Honored Contributor
12 years ago --- Quote Start --- the design is implemented slightly different from the RTL, e.g. DD3-3 is clocked directly by p41. --- Quote End --- Yes, I can see this now, thanks... I completely agree the design is not the greatest, but it works very well in real hardware. I expected that implementing this schematics in CPLD is going to be pretty easy, but now I have no idea what can I do if the software does things I have not asked for... Do you have any suggestion how should I fight this problem realistically ?