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I am having some problems programming multiplication in VHDL
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As Kaz points out, you have not created a synchronous process. In addition, I would advise you to create a simulation of your logic, as then you would be able to state "It works in simulation, but not in hardware", and from that we can point out what can go wrong in hardware :)
Read through this tutorial on using FPGAs for doing signal processing, look at the slides, and download the code;
http://www.ovro.caltech.edu/~dwh/correlator/pdf/esc-104paper_hawkins.pdf http://www.ovro.caltech.edu/~dwh/correlator/pdf/esc-104slides_hawkins.pdf http://www.ovro.caltech.edu/~dwh/correlator/pdf/esc-104code_hawkins.zip The tutorial was tested on the DE0-nano. One of the examples shows how you can reduce the width of your product, eg., you do not need to keep all 64-bits of the 32-bit x 32-bit product if you do not want to.
You'll also see how SignalTap II can be used in hardware to "see" what is going on; which can help with "it does not work in hardware" ... :)
Cheers,
Dave
Honored Contributor
