Forum Discussion
Altera_Forum
Honored Contributor
9 years agoWell, it's a small project that I have been working on. So, yes it's more like a homework. It's basically an (8x1) multiplexing system that takes a clock and its divided versions (div2, div3,...,div8) as its inputs and selects between them. It might be easy for some; but I'm rather new to VHDL. I tried Block Diagram/Schematics but the coding sounds more flexible. I would grateful to your help.