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Altera_Forum's avatar
Altera_Forum
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11 years ago

Waveform- Forcing Unknown(X)

Hello , i have a problem about the waveform simulation. I have design the mic1 processor and i want to add A[32](bus line) + B[32] ((bus line)=C[32](bus line). For example A=200 and B=0. When i run t...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

'altsyncram' blocks typically have registers on their input signals and optionally on it's output signals. So, the value on 'q' won't be valid for up to 2 clock cycles after the address is presented.

Could this explain what you're seeing?

Cheers,

Alex

PS. As you've opened this on another thread I suggest you don't continue posting on this one :)