Forum Discussion
Hi TSchu3,
I'm Adzim. Thanks for using Intel Community.
Based on your description above, I think that you have performed the IP Upgrade in Quartus 21.2 for the example project.
And the project is working fine.
Then you create new EMIF IP for your project in Quartus 21.2 but then it's failed.
The calibration failure may be caused between the memory and the PHY.
It's also can be caused by the board but your board is working fine with the example project.
Can you check the memory connection by comparing with the example project?
Do the reset is asserted during the calibration process?
Sometimes the reset may interrupt the calibration process.
Can you check your reset signal as well?
Thanks,
Adzim
Thanks, Adzim_Intel, but I am not sure what you are asking me.
When you ask about comparing with the example project; I have recreated all the parameters and settings of the example project exactly as far as I can tell. The example project calibrates, my re-creation does not.
The reset signal is tied to a push button on the board. It does not occur during calibration only when I press the button.
- AdzimZM_Altera4 years ago
Regular Contributor
Do you have the calibration report for this failure?
Or do you mind to share the project with me?
I want to replicate the issue and help you debug this issue.
- TSchu34 years ago
Occasional Contributor
I will get those files to you today. Thanks
- TSchu34 years ago
Occasional Contributor
Here is the project that I created based on the example project. It is intended to do nothing other than instantiate the EMIF controller and calibrate the DDR3.
- AdzimZM_Altera4 years ago
Regular Contributor
Hi Sir,
Thank you for sharing the project file.
I will test the project.
But unfortunately due to current situation, I'm not able to get the board yet.
So for now can you provide the Calibration report?
Thanks,
Adzim