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Altera_Forum's avatar
Altera_Forum
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12 years ago

WADDR, WE, and DATAIN for SYSC_RAM module

I implemented a RAM in a sub-module. RAM values (an array) are filled via an initial block. However, compilation gave me three warnings, that is, "WADDR, WE, and DATAIN" of SYNC_RAM block have no dr...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

However, as I understand, it is not allowed to instantiate a sub-module in an always block. O/w, the compiler will complain.

I am trying to implement an algorithm with loops, and I need to read this ROM one value by one value for each loop respectively. The loops are implemented via clocks.

Thanks in advance.