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Altera_Forum's avatar
Altera_Forum
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10 years ago

VHDL2008 matching equality operator

i can't get VHDL-2008 matching equality operator compiled on quartus2. when i compile the code below it says: Error (10327): VHDL error at test.vhd(13): can't determine definition of operator "...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

It could be the fact that Quartus VHDL 2008 support is far from complete. The matching equality operator is also implicitly used when you use the following code: 


a : std_logic;
....
if a then

They may mean they only support this form.

Otherwise, raise a support ticket for better 2008 support?

Does the code compile fine in Modelsim?