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Altera_Forum's avatar
Altera_Forum
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13 years ago

VHDL probably so simple you could do it in your sleep...but I can't

I need to write a code that "has two unsigned 6b inputs, inputa and inputb, and two outputs, multresult and iseven. multresult should give the result, without overflow, when the two inputs ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

Just googled K.I.S.S and was impressed because I was looking for that concept all my life, thanks for the tip. I really feel feverish when I see any spaghetti logic and

long strings of code. I know it will go wrong. So keep it simple and use others well proven work called various names: functions, ip, cores, +, -, * ...etc. We all build blocks from other blocks and it is waste of time to rebuild what is right on your desk.