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ZKhan1's avatar
ZKhan1
Icon for Occasional Contributor rankOccasional Contributor
4 years ago
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VHDL Package not detected by Modelsim

Hi all , I am using Quartus Prime ver 16.0 for compilation of my vhdl project files , the project compiles fine without any errors , but when i start simulation the Modelsim cantt seem to find my ...
  • sstrell's avatar
    sstrell
    4 years ago

    Spelling difference? audio_codec_i2c_pkg vs. audio_codeci2c_pkg

ZKhan1's avatar
ZKhan1
Icon for Occasional Contributor rankOccasional Contributor
3 years ago

This is vmap output of a working testbench another project :

# vmap
# Reading modelsim.ini
# "work" maps to directory ./rtl_work.
# Reading C:/altera_lite/16.0/modelsim_ase/win32aloem/../modelsim.ini
# "std" maps to directory C:/altera_lite/16.0/modelsim_ase/win32aloem/../std.
# "ieee" maps to directory C:/altera_lite/16.0/modelsim_ase/win32aloem/../ieee.
# "verilog" maps to directory C:/altera_lite/16.0/modelsim_ase/win32aloem/../verilog.
# "vital2000" maps to directory C:/altera_lite/16.0/modelsim_ase/win32aloem/../vital2000.
# "std_developerskit" maps to directory C:/altera_lite/16.0/modelsim_ase/win32aloem/../std_developerskit.
# "synopsys" maps to directory C:/altera_lite/16.0/modelsim_ase/win32aloem/../synopsys.
# "modelsim_lib" maps to directory C:/altera_lite/16.0/modelsim_ase/win32aloem/../modelsim_lib.