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Altera_Forum's avatar
Altera_Forum
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10 years ago

Vhdl jpeg decoder

Hi, I am working on a project where I need to implement a JPEG decoder to decode the JPEG output (1080p) of the camera (model: OV5642). My FPGA is DE1-SoC Cyclone V. I have been able to implement a j...
Altera_Forum's avatar
Altera_Forum
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10 years ago

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Have you optimized c code?

And where is the bottleneck?

If you profiled your decoder you should know dataflow path.

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Yes, I know my way around the c code and was able to optimize it. However, the thing is that the clock frequency of the hard processor system is just not enough after a certain point. For example, after optimizing the code, I have achieved 15 fps. So, since I need 30 fps, I turned my direction to finding a vhdl open source for jpeg decoding that can be run on an Altera board. Do you know anything like that? If there is not any, I will have to stick with the c code, of course. Thank you for your response.