Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

Vhdl jpeg decoder

Hi, I am working on a project where I need to implement a JPEG decoder to decode the JPEG output (1080p) of the camera (model: OV5642). My FPGA is DE1-SoC Cyclone V. I have been able to implement a j...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

Have you optimized c code?

And where is the bottleneck?

If you profiled your decoder you should know dataflow path.